Objective To design a circuit using 555 timer that will help to see our thing inside of the cabinet
To design a circuit using 555 timer that will help to see our thing inside of the cabinet.
The 555 timer IC is component like chip that help in a variety of timer, pulse generation, and oscillator applications. The 555 used for delays time,in a oscillator and in flip-flop. It derivative become one package.In the package consist of two 556 or 558 timing cicuit.Internal Block Diagram
Green: Between the positive supply voltage VCC and the ground GND is a voltage divider consisting of three identical resistors, which create two reference voltages at ?1?3VCC and ?2?3 VCC. The latter is connected to the “Control Voltage” pin. All three resistors have the same resistance, 5 k? for bipolar timers, 100 k? (or other high resistance values) for CMOS timers. It is a false myth that the 555 IC got its name from these three 5 k? resistors.5Yellow: The comparator negative input is connected to the higher-reference voltage divider of ?2?3 VCC (and “Control” pin), and comparator positive input is connected to the “Threshold” pin.
Red: The comparator positive input is connected to the lower-reference voltage divider of ?1?3 VCC, and comparator negative input is connected to the “Trigger” pin.
Purple: An SR flip-flop stores the state of the timer and is controlled by the two comparators. The “Reset” pin overrides the other two inputs, thus the flip-flop (and therefore the entire timer) can be reset at any time.
Pink: The output of the flip-flop is followed by an output stage with push-pull (P.P.) output drivers that can load the “Output” pin with up to 200 mA (varies by device).
Cyan: Also, the output of the flip-flop turns on a transistors that connects the “Discharge” pin to ground.
Pin name Pin direction Pin purpose
1 GND Power Ground supply: this pin is the ground reference voltage (zero volts).
2 TRIG Input Trigger: when the voltage at this pin falls below ?1?2 of CONT pin voltage (?1?3 VCC except when CONT is driven by an external signal), the OUT pin goes high and a timing interval starts. As long as this pin continues to be kept at a low voltage, the OUT pin will remain high.
3 OUT Output Output: this is a push-pull (P.P.) output that is driven to either a low state (ground supply at GND pin) or a high state (positive supply at VCC pin minus approximately 1.7 Volts). (Note: For CMOS timers, the high state is driven to VCC.) When bipolar timers are used in applications where the output drives a TTL input, a 100 to 1000 pF decoupling capacitor may need to be added to prevent double triggering
4 RESET Input Reset: a timing interval may be reset by driving this pin to GND, but the timing does not begin again until this pin rises above approximately 0.7 Volts. This pin overrides TRIG (trigger), which overrides THRES (threshold). In most applications this pin is not used, thus it should be connected to VCC to prevent electrical noise causing a reset.
5 CONT Input Control (or Control Voltage): this pin provides access to the internal voltage divider (?2?3 VCC by default). By applying a voltage to the CONT input one can alter the timing characteristics of the device. In most applications this pin is not used, thus a 10 nF decoupling capacitor) should be connected between this pin and GND to ensure electrical noise isn’t added to the higher reference voltage.2 This control pin input can be used to build an astable multivibrator with a frequency-modulated output.
6 THRES Input Threshold: when the voltage at this pin is greater than the voltage at CONT pin (?2?3 VCC except when CONT is driven by an external signal), then the timing (OUT high) interval ends.
7 DICSH Output Discharge: this is an open-collector (O.C.) output (CMOS timers are open-drain), which can be used to discharge a capacitor between intervals, in phase with output.
8 VccPower Positive supply: the guaranteed voltage range of bipolar timers is typically 4.5 to 15 Volts (some timers are spec’ed for up to 16 Volts or 18 Volts), though most will operate as low as 3 Volts. (Note: CMOS timers have a lower minimum voltage rating, which varies depending on the part number.) See the supply min and max columns in the derivatites table For bipolar timers, a bypass capacitor is required because of current surges during output switching.
Charging and Discharging process
The control voltage(Vcont) changes the threshold value of the 1/3 Vcc and 2/3 Vcc for the internal comparators. With the control voltage, the upper value is Vcont and the lower value ½ Vcont. When the control voltage is varied, the output frequency also varies. An increasing in Vcont increases the charging and discharging time of the external capacitor and causes the frequency to decreases. A decreases in Vcont decreases the charging and discharging time of the capacitor and causes the frequency to increases.
Duty cycle =(tH/T)100%=(tH/tH+tL)100%
Duty cycle=(R1+ R2/R1+2R2)100%
Operation of 555 timer
Features of 555 timer IC
It operates from a wide range of power supplies ranging from + 5 Volts to + 18 Volts supply voltage.
Sinking or sourcing 200 mA of load current.
The external components should be selected properly so that the timing intervals can be done in several minutes along with the frequencies exceeding several hundred kilo Hertz.
The output of a 555 timer can drive a transistor-transistor logic (TTL) due to its high current output.
It has a temperature stability of 50 parts per million (ppm) per degree Celsius change in temperature, or equivalently 0.005 %/ °C.
The duty cycle of the timer is adjustable.
The maximum power dissipation per package is 600 mW and its trigger and reset inputs has logic compatibility.